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Guest Speaker: James C. Hoe

Friday, April 14, 2017, 4:00 pm

James C. Hoe
480 Dreese Labs
2015 Neil Avenue
Columbus, Ohio 43210

 

CoRAM++: Data-Structure-Specific Memory Interfaces for FPGA Computing

The practicality and effectiveness of FPGA computing is no longer an academic conjecture.  However, programmability and portability of applications remain a major challenge to adoption.  This talk presents our work on the CoRAM abstraction to serve as a portable and high-performance abstraction layer between the distributed in-fabric computation kernels and the external environment, in particular the off-chip DRAM.  The talk will begin with a brief review of the baseline CoRAM concepts (decomposed computation kernels and control threads) before delving into our new efforts in providing application-level memory access interfaces that directly support the high-level semantics of commonly-used in-memory data structure types (e.g., streams, arrays, linked lists, and trees).  CoRAM++ interface library builds in soft-logic not only the application-level interfaces appropriate for the supported data structure types but also specialized implementations of the supporting datapath to memory. 

Our evaluations show that CoRAM++ can offer convenient application-level interfaces without penalizing DRAM access performance.

Bio: James C. Hoe is a Professor of Electrical and Computer Engineering at Carnegie Mellon University. He received his Ph.D. in EECS from Massachusetts Institute of Technology in 2000 (S.M., 1994). He received his B.S. in EECS from UC Berkeley in 1992. He is interested in many aspects of computer architecture and digital hardware design, including the specific areas of FPGA architecture for computing; digital signal processing hardware; and high-level hardware design and synthesis. He is a Fellow of IEEE. For more information, please visit http://www.ece.cmu.edu/~jhoe.