2018

• Rawat, P.S.; Sukumaran-Rajam, A.; Rountev, A.; Rastello, F. et al. "Register optimizations for stencils on GPUs." (2 2018).
• Hong, C.; Sukumaran-Rajam, A.; Kim, J.; Rawat, P.S. et al. "POSTER: Performance modeling for GPUs using abstract kernel emulation." (2 2018).

2017

• Kunchum, R.; Chaudhry, A.; Sukumaran-Rajam, A.; Niu, Q. et al. "On improving performance of sparse matrix-matrix multiplication on GPUs." (6 2017).
• Tavarageri, S.; Kim, W.; Torrellas, J.; Sadayappan, P. "Compiler Support for Software Cache Coherence." (2 2017).

2016

• Wenlei Bao, Sriram Krishnamoorthy, Louis-Noël Pouchet, Fabrice Rastello, P. Sadayappan "PolyCheck: dynamic verification of iteration space transformations on affine programs." (1 2016).
• Compiler Support for Software Cache Coherence "Sanket Tavarageri, Wooil Kim, Josep Torrellas, P Sadayappan." (12 2016).
• Timothy Carpenter, Fabrice Rastello, P Sadayappan, Anastasios Sidiropoulos "Brief Announcement: Approximating the I/O Complexity of One-Shot Red-Blue Pebbling." (7 2016).

2015

• Venmugil Elango, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan "On Characterizing the Data Access Complexity of Programs." (1 2015).
• Arafat, H.; Krishnamoorthy, S.; Sadayappan, P. "Checksumming Strategies for Data in Volatile Memories." (1 2015).
• Sedaghati, N.; Mu, T.; Pouchet, L.N.; Parthasarathy, S. et al. "Automatic selection of sparse matrix representation on GPUs." (6 2015).
• Naser Sedaghati, Te Mu, Louis-Noël Pouchet, Srinivasan Parthasarathy, P. Sadayappan "Automatic Selection of Sparse Matrix Representation on GPUs." (6 2015).
• Bao, W.; Tavarageri, S.; Ozguner, F.; Sadayappan, P. "PWCET: Power-Aware Worst Case Execution Time Analysis." (1 2015).
• Tobias Grosser, Sebastian Pop, Louis-Noël Pouchet, P. Sadayappan, Sebastian Pop "Optimistic Delinearization of Parametrically Sized Arrays." (6 2015).
• Naznin Fauzia, Louis-Noël Pouchet, P. Sadayappan "Characterizing and enhancing global memory data coalescing on GPUs." (2 2015).

2014

• Arash Ashari, Naser Sedaghati, John Eisenlohr, Srinivasan Parthasarathy, P. Sadayappan: "Fast Sparse Matrix-Vector Multiplication on GPUs for Graph Applications." (11 2014).
• Venmugil Elango, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan "On Characterizing the Data Movement Complexity of Computational DAGs for Parallel Execution." in SPAA 2014. (6 2014).
• Kamil, S.; Amarasinghe, S.; Sadayappan, P. "WOSC 2014: Second Workshop on Optimizing Stencil Computations." (1 2014).

2013

• Ye Wang, Srinivasan Parthasarathy, P. Sadayappan "Stratification driven placement of complex data: A framework for distributed data analytics." in ICDE 2013. (6 2013).
• Tavarageri, S.; Sadayappan, P. "A compiler analysis to determine useful cache size for energy efficiency." (1 2013).

2012

• Sadayappan, P.; Ramanujam, J. "Chairs' Welcome." (3 2012).
• Godwin, J.; Holewinski, J.; Sadayappan, P. "High-performance sparse matrix-vector multiplication on GPUs for structured grid computations." (3 2012).
• Mahesh Ravishankar, John Eisenlohr, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, and P. Sadayappan "Code generation for parallel execution of a class of irregular loops on distributed memory systems." (11 2012).
• Jun Shirako, Kamal Sharma, Naznin Fauzia, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan, and Vivek Sarkar "Analytical Bounds for Optimal Tile Size Selection." (3 2012).
• Justin Holewinski, Ragavendar Ramamurthi, Mahesh Ravishankan, Naznin Fauzia, Louis-Noel Pouchet, Atanas Rountev, and P. Sadayappan "Dynamic Trace-Based Analysis of Vectorization Potential of Applications." (6 2012).

2011

• Eunjung Park, Louis-Noël Pouchet, John Cavazos, Albert Cohen, P. Sadayappan "Predictive modeling in a polyhedral optimization space." in International Symposium on Code Generation and Optimization (CGO 2011). (4 2011).
• Minnich, R.G.; Janssen, C.L.; Krishnamoorthy, S.; Marquez, A. et al. "Fault oblivious eXascale whitepaper." (7 2011).
• Naser Sedaghati, Renji Thomas, Louis-Noël Pouchet, Radu Teodorescu, and P. Sadayappan "StVEC: A Vector Instruction Extension for High Performance Stencil Computation." in PACT. (10 2011).
• Minnich, R.G.; Janssen, C.L.; Krishnamoorthy, S.; Marquez, A. et al. "FOX: A fault-oblivious extreme scale execution environment." (12 2011).
• Thomas Henretty, Kevin Stock, Louis-Noël Pouchet, Franz Franchetti, J. Ramanujam, P. Sadayappan "Data Layout Transformation for Stencil Computations on Short-Vector SIMD Architectures." in International Conference on Compiler Construction (CC 2011). (3 2011).

2010

• A. Hartono, M. Baskaran, J. Ramanujam, and P. Sadayappan "Parametric Tiled Loop Generation for Effective Parallel Execution on Multicore Processors." in Proc. 24th IEEE International Parallel and Distributed Processing Symposium (IPDPS). (1 2010).
• Atanas Rountev, Kevin Van Valkenburgh, Dacong Yan, P. Sadayappan "Understanding parallelism-inhibiting dependences in sequential Java programs." in International Conference on Software Maintenance (ICSM 2010). (9 2010).
• Dinan, J.; Singri, A.; Sadayappan, P.; Krishnamoorthy, S. "Selective recovery from failures in a task parallel programming model." (7 2010).
• Leung, V.J.; Sabin, G.; Sadayappan, P. "Parallel job scheduling policies to improve fairness: A case study." (12 2010).
• Hartono, A.; Baskaran, M.M.; Ramanujam, J.; Sadayappan, P. "DynTile: Parametric tiled loop generation for parallel execution on multicore processors." (7 2010).

2009

• Vijay S. Kumar, P. Sadayappan, Gaurang Mehta, Karan Vahi, Ewa Deelman, Varun Ratnakar, Jihie Kim, Yolanda Gil, Mary W. Hall, Tahsin M. Kurç, Joel H. Saltz "An integrated framework for performance-based optimization of scientific workflows." in Proceedings of the 18th ACM International Symposium on High Performance Distributed Computing, HPDC 2009. (6 2009).

2008

• D. B. Larkins, J. Dinan, S. Krishnamoorthy, S. Parthasarathy, A. Rountev, and P. Sadayappan "“Global trees: a framework for linked data structures on distributed memory parallel systems”." in Proc. Supercomputing (SC). (11 2008).
• Bondhugula, U.; Hartono, A.; Ramanujam, J.; Sadayappan, P. "A practical automatic polyhedral parallelizer and locality optimizer." (12 2008).
• Vydyanathant, N.; Catalyurek, U.; Kurc, T.; Sadayappan, P. et al. "A duplication based algorithm for optimizing latency under throughput constraints for streaming workflows." (11 2008).
• Dinan, J.; Krishnamoorthy, S.; Larkins, D.B.; Nieplocha, J. et al. "Scioto: A framework for global-view task parallelism." (11 2008).
• G. Khanna, U. Catalyurek, T. Kurc, R. Kettimuthu, P. Sadayappan, I. Foster, J. H. Saltz "Using overlays for efficient data transfer over shared wide-area networks." in Proc. Supercomputing (SC). (11 2008).
• U. Bondhugula, M. Baskaran, S. Krishnamoorthy, J. Ramanujam, A. Rountev and P. Sadayappan "Automatic transformations for communication-minimized parallelization and locality optimization in the polyhedral model." in International Conference on Compiler Construction(CC). (1 2008).
• Lin, J.; Lu, Q.; Ding, X.; Zhang, Z. et al. "Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems." (12 2008).

2007

• Krishnamoorthy, S.; Catalyurek, U.; Nieplocha, J.; Rountev, A. et al. "A global address space framework for locality aware scheduling of block-sparse computations." (9 2007).
• Diñan, J.; Olivier, S.; Sabin, G.; Prins, J. et al. "Dynamic load balancing of unbalanced computations using message passing." (9 2007).

2006

• S. Krishnamoorthy, U. Catalyurek, J. Nieplocha, A. Rountev and P. Sadayappan "Hypergraph Partitioning for Automatic Memory Hierarchy Management." in Proc. Supercomputing (SC). (11 2006).
• Chaudhary, V.; Sadayappan, P. "Message from the CRTPC workshop co-chairs." (12 2006).
• Krishnamoorthy, S.; Catalyurek, U.; Nieplocha, J.; Rountev, A. et al. "An extensible global address space framework with decoupled task and data abstractions." (1 2006).
• Krishnamoorthy, S.; Catalyurek, U.; Nieplocha, J.; Sadayappan, P. "An approach to locality-conscious load balancing and transparent memory hierarchy management with a global-address-space parallel programming model." (1 2006).
• Allam, A.; Ramanujam, J.; Baumgartner, G.; Sadayappan, P. "Memory minimization for tensor contractions using integer linear programming." (12 2006).
• Vydyanathan, N.; Khanna, G.; Catalyurek, U.; Kurc, T. et al. "Scheduling of tasks with batch-shared I/O on heterogeneous systems." (1 2006).

2005

• Chaudhary, V.; Sadayappan, P. "Message from the CRTPC chairs." (12 2005).

2004

• Lu, Q.; Wu, J.; Panda, D.; Sadayappan, P. "Applying MPI derived datatypes to the NAS benchmarks: A case study." (12 2004).

2003

• M. Islam, P. Balaji, P. Sadayappan and D.K. Panda "QoPS: A QoS based scheme for Parallel Job Scheduling." in Proceedings of the Ninth Workshop on Job Scheduling Strategies for Parallel Processing (JSSPP). (7 2003).

2002

• S. Srinivasan, V. Subramani, R. Kettimuthu, P. Holenarsipur and P. Sadayappan "Effective Selection of Partition Sizes for Moldable Scheduling of Parallel Jobs." in Proc. Ninth Intl. Conf. on High Performance Computing (HiPC). (12 2002).
• S. Srinivasan, R. Kettimuthu, V. Subramani and P. Sadayappan "Selective Reservation Strategies for Backfill Job Scheduling." in Proc. of 8th Workshop on Job Scheduling Strategies for Parallel Processing (JSSPP). (7 2002).
• Baumgartner, G.; Bernholdt, D.E.; Cociorva, D.; Harrison, R. et al. "A performance optimization framework for compilation of tensor contraction expressions into parallel." (1 2002).
• D. Cociorva, G. Baumgartner, C. Lam, P. Sadayappan, J. Ramanujam, M. Nooijen, D. Bernholdt, R. Harrison and R. Pitzer "A High-Level Approach to Synthesis of High-Performance Codes for Quantum Chemistry." in Proceedings of Supercomputing (SC). (11 2002).

2001

• Amit Singhal, Mohammad Banikazemi, P. Sadayappan, and D. K. Panda "Efficient Multicast Algorithms for Heterogeneous Switch-based Irregular Networks of Workstations." in Proceedings of International Parallel and Distributed Processing Symposium (IPDPS). (4 2001).
• Buntinas, D.; Panda, D.K.; Sadayappan, P. "Performance benefits of NIC-based barrier on myrinet/GM." (1 2001).
• Singhal, A.; Banikazemi, M.; Sadayappan, P.; Panda, D.K. "Efficient multicast algorithms for switch-based irregular heterogeneous networks of workstations." (1 2001).
• Welsh, D.J.S.; Bedford, K.W.; Guo, Y.; Sadayappan, P. "A coupled wave, current, and sediment transport modeling system." (12 2001).

2000

• Lam, C.C.; Cociorva, D.; Baumgartner, G.; Sadayappan, P. "Optimization of memory usage requirement for a class of loops implementing multi-dimensional integrals." (1 2000).
• Morgan, P.E.; Visbal, M.R.; Sadayappan, P. "Application of a parallel implicit Navier-Stokes solver to three dimensional viscous flows." (12 2000).

1997

• Lam, C.C.; Sadayappan, P.; Wenger, R. "Optimal reordering and mapping of a class of nested-loops for parallel execution." (1 1997).

1996

• Kaushik, S.D.; Huang, C.H.; Sadayappan, P. "Compiling array statements for efficient execution on distributed-memory machines: Two-level mappings." (1 1996).

1995

• Kaushik, S.D.; Huang, C.H.; Sadayappan, P. "Incremental generation of index sets for array statement execution on distributed-memory machines." (1 1995).
• Eswar, K.; Huang, C.H.; Sadayappan, P. "On mapping data and computation for parallel sparse Cholesky factorization." (1 1995).
• Kaushik, S.D.; Huang, C.H.; Ramanujam, J.; Sadayappan, P. "Multi-phase array redistribution: modeling and evaluation." (1 1995).

1994

• Amin, A.; Sadayappan, P.; Gudavalli, M. "Clustered reduced communication element by element preconditioned conjugate gradient algorithm for finite element computations." (1 1994).
• Gupta, H.; Sadayappan, P. "Communication efficient matrix multiplication on hypercubes." (8 1994).
• Kaushik, S.D.; Huang, C.H.; Johnson, R.W.; Sadayappan, P. "An approach to communication-efficient data redistribution." (7 1994).
• Kumar, B.; Sadayappan, P.; Huang, C.H. "On sparse matrix reordering for parallel factorization." (7 1994).
• Gupat, S.K.S.; Huang, C.H.; Johnson, R.W.; Sadayappan, P. "Communication-efficient implementation of block recursive algorithms on distributed-memory machines." (12 1994).

1993

• Gupta, S.; Huang, C.H.; Sadayappan, P.; Johnson, R. "On the synthesis of parallel programs from tensor product formulas for block recursive algorithms." (1 1993).

1992

• Amin, A.; Sadayappan, P.; Chaudhary, A. "Parallel ALPID-3D: A 3-D metal forming program for parallel computers." (12 1992).
• Amin, A.; Sadayappan, P.; Chaudhary, A. "Parallel ALPID-3D. A 3-D metal forming program for parallel computers." (6 1992).

1991

• McMillan, S.; Orin, D.E.; Sadayappan, P. "Parallel real-time dynamic simulation of robots." (1 1991).

1990

• Krothapalli, V.P.; Sadayappan, P. "Exploiting parallelism through run-time analysis on a vector processor." (1 1990).
• Krothapalli, V.P.; Sadayappan, P. "Dynamic scheduling of DOACROSS loops for multiprocessors." (1 1990).

1988

• Ercal, F.; Ramanujam, J.; Sadayappan, P. "Task allocation onto a hypercube by recursive mincut bipartitioning." (1 1988).
• Krothapalli, V.P.; Sadayappan, P. "An approach to synchronization for parallel computing." (6 1988).
• Ramanujam, J.; Sadayappan, P. "Optimization by neural networks." (12 1988).
• Goel, A.; Ramanujam, J.; Sadayappan, P. "Towards a 'neural' architecture for abductive reasoning." (12 1988).
• Goel, A.; Sadayappan, P.; Josephson, J.R. "Concurrent synthesis of composite explanatory hypotheses." (12 1988).
• Sadayappan, P.; Visvanathan, V. "Modeling and optimal scheduling of parallel sparse Gaussian elimination." (12 1988).
• Ling, Y.L.C.; Sadayappan, P.; Olson, K.W.; Orlin, D.E. "VLSI ROBOTICS VECTOR PROCESSOR FOR REAL-TIME CONTROL.." (1 1988).
• Sadayappan, P.; Visvanathan, V. "Parallelization and performance evaluation of circuit simulation on a shared-memory multiprocessor." (6 1988).
• Sadayappan, P.; Visvanathan, V. "Comparative analysis of approaches to hardware acceleration for sparse-matrix factorization." (12 1988).

1987

• Ling, Y.L.C.; Olson, K.W.; Orin, D.E.; Sadayappan, P. "LAYERED RESTRUCTURABLE VLSI ARCHITECTURE FOR ROBOTIC CONTROL.." (12 1987).
• Sadayappan, P.; Visvanathan, V. "CIRCUIT SIMULATION ON A MULTIPROCESSOR.." (1 1987).
• Sadayappan, P.; Ercal, F.; Martin, S. "MAPPING FINITE ELEMENT GRAPHS ONTO PROCESSOR MESHES.." (12 1987).

1986

• Ercal, F.; Sadayappan, P.; Schwan, K.; Weide, B. et al. "PARALLEL COMPUTERS FOR FINITE ELEMENT ANALYSIS.." (1 1986).

1985

• Ashok, V.; Costello, V.A.; Sadayappan, P. "MODELING SWITCH-LEVEL SIMULATION USING DATA FLOW.." (12 1985).
• Ashok, V.; Costello, R.; Sadayappan, P. "DISTRIBUTED DISCRETE EVENT SIMULATION USING DATAFLOW.." (12 1985).

1984

• Sadayappan, P.; Smith, D.R. "TASK DISTRIBUTION ON A HIERARCHICAL MULTICOMPUTER.." (12 1984).